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Research Papers

Surrogate Modeling of Multistage Assembly Processes Using Integrated Emulation

[+] Author and Article Information
Qiang Zhou

Department of Industrial and Systems Engineering,  University of Wisconsin, Madison, 1513 University Avenue, Madison, WI 53706qzhou3@wisc.edu

Peter Z. G. Qian

 Department of Statistics, 1300 University Avenue, Madison, WI 53706peterq@stat.wisc.edu

Shiyu Zhou1

Department of Industrial and Systems Engineering,  University of Wisconsin, Madison, 1513 University Avenue, Madison, WI 53706szhou@engr.wisc.edu

1

Corresponding author.

J. Mech. Des 134(1), 011002 (Jan 04, 2012) (10 pages) doi:10.1115/1.4005440 History: Received August 15, 2010; Revised August 06, 2011; Published January 04, 2012; Online January 04, 2012

For the design and optimization of multistage assembly processes, a computationally cheap mathematical model that links design parameters with the final product dimensional quality is highly desirable. We propose a systematic approach to building a surrogate model of simulations of multistage assembly processes. At the heart of this approach is a multiple-input-multiple-output surrogate modeling framework that uses a recently developed integrated emulation technique. The unique feature of this technique is that the surrogate models for multiple outputs are fitted simultaneously. The corresponding experimental design issues are also addressed. The proposed method provides good prediction accuracy and requires minimal physical knowledge of the underlying system. The effectiveness of the method is demonstrated through a case study.

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Copyright © 2012 by American Society of Mechanical Engineers
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Figures

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Figure 1

Illustration of dimensional variation propagation in a multistage assembly system

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Figure 2

Simulation based surrogate modeling procedure

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Figure 3

Illustration of integrated emulation approach

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Figure 4

Illustration of undesirable fixture layout with near singular Jacobian matrix

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Figure 5

Illustration of reorientation error

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Figure 6

Case study multistage assembly process

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Figure 7

Modeling structure and error flow of the assembly process

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